fixed relative memory addressing bug

6 files changed, 25 insertions, 43 deletions

diff --git a/prog/link.ld b/prog/link.ld
index 4cc02ec..7bd11eb 100644
--- a/prog/link.ld
+++ b/prog/link.ld
@@ -43,7 +43,7 @@ SECTIONS
     .stack (NOLOAD) :
     {
         _stack_start = .;
-        . += 0x10; /* Adjust the size as needed */
+        . += 0x80; /* Adjust the size as needed */
         _stack_end = .;
     } > RAM
 
@@ -51,7 +51,7 @@ SECTIONS
     .heap (NOLOAD) :
     {
         _heap_start = .;
-        . += 0x10; /* Adjust the size as needed */
+        . += 0x80; /* Adjust the size as needed */
         _heap_end = .;
     } > RAM
 }
diff --git a/prog/src/main.c b/prog/src/main.c
index 1ce067c..8bcdfe2 100644
--- a/prog/src/main.c
+++ b/prog/src/main.c
@@ -1,6 +1,8 @@
 
+extern void test_prog(void);
 
 int main(void) {
+  test_prog();
   while (1) {
   }
 }
diff --git a/prog/src/prog.s.bak b/prog/src/prog.s
index 63026c9..ec227a9 100644
--- a/prog/src/prog.s.bak
+++ b/prog/src/prog.s
@@ -1,11 +1,5 @@
 .section .text
-.globl _start
-
-_start:
-
- 
- j test_prog
-
+.globl test_prog
 
 
 /*
@@ -18,9 +12,6 @@ loop:
   j loop
 */
 
-halt_loop:
-  j halt_loop
-
 test_prog:
   li t0, 0xFFFFFFFF
   li t1, 0x33333333
@@ -45,19 +36,25 @@ test_prog:
   
   beq   t0, t0, branch_eq
   j branch_eq_nt
+end:
+  ret
 
 branch_eq_ret:
   beq   t0, t3, branch_ne
   j branch_ne_nt
 
 branch_ne_ret:
+  addi sp, sp, -16  # Adjust stack pointer to make space for ra and s0
+  sw ra, 0(sp)      # Save ra to the stack
   call func
+  lw ra, 0(sp)      # Load ra from the stack
+  addi sp, sp, 16   # Restore stack pointer
 
   li  t0, 0x00100000 
   sw  t1, 0(t0)
   lw  t2, 0(t0)
 
-  j halt_loop
+  j end
 
 
 branch_eq:
@@ -79,21 +76,3 @@ branch_ne_nt:
 func:
   addi  t5, zero, 5
   ret
-
-
-
-
-
-
-
-
-
- 
-.section .data
-
-
-.section .bss
-
-.section .stack
-  .space 0x1000  # Allocate stack space
-stack_top:
diff --git a/src/memory_interface.v b/src/memory_interface.v
index da06d1a..e6ff713 100644
--- a/src/memory_interface.v
+++ b/src/memory_interface.v
@@ -11,19 +11,20 @@ module memory_interface (
 
 reg ram_we;
 wire [31:0] ram_read_data, rom_read_data;
+reg [31:0] rel_addr;
 
 ram #(.N(32), .SIZE(1024)) ram(
   .clk(clk),
   .rstn(rstn),
   .we(ram_we),
-  .addr(addr),
+  .addr(rel_addr),
   .data_read(ram_read_data),
   .data_write(wd)
 );
 
 rom #(.N(32), .SIZE(1024)) rom(
   .clk(clk),
-  .addr(addr),
+  .addr(rel_addr),
   .data_read(rom_read_data)
 );
 
@@ -42,18 +43,18 @@ rom #(.N(32), .SIZE(1024)) rom(
 
 
 always @(*) begin
-  if (addr[31:16] >= 16'h0001 && addr[31:16] <= 16'h000F) begin
+  if (         addr >= 32'h0001_0000 && addr <= 32'h000F_0000) begin
     ram_we = 0;
     rd = rom_read_data;
-  end else if (addr[31:16] >= 16'h0010 && addr[31:16] <= 16'hFF0F) begin
+    rel_addr = addr - 32'h0001_0000;
+  end else if (addr >= 32'h0010_0000 && addr <= 32'hFF0F_0000) begin
     ram_we = we;
     rd = ram_read_data;
-  end else if (addr[31:16] >= 16'hFF10 && addr[31:16] <= 16'hFFFF) begin
-    ram_we = 0;
-    rd = 0;
+    rel_addr = addr - 32'h0010_0000;
   end else begin
     ram_we = 0;
     rd = 0;
+    rel_addr = 0;
   end
 end
 
diff --git a/src/ram.v b/src/ram.v
index 91bb133..541096e 100644
--- a/src/ram.v
+++ b/src/ram.v
@@ -5,7 +5,7 @@ module ram #(
     input clk,
     input rstn,
     input we,
-    input [log2(SIZE/4)-1:0] addr,
+    input [N-1:0] addr,
     input [N-1:0] data_write,
     output reg [N-1:0] data_read
 );
@@ -13,7 +13,7 @@ module ram #(
 `include "include/log2.vh"
 
 //(* RAM_STYLE="BLOCK" *)
-reg [N-1:0] mem [SIZE-1:0];
+reg [N-1:0] mem [0:SIZE-1];
 
 always @(posedge clk) begin
   if (we) mem[addr >> 2] <= data_write; 
diff --git a/src/rom.v b/src/rom.v
index b317094..d93ef07 100644
--- a/src/rom.v
+++ b/src/rom.v
@@ -3,7 +3,7 @@ module rom #(
   parameter SIZE = 1024
 )(
     input clk,
-    input [log2(SIZE/4)-1:0] addr,
+    input [N-1:0] addr,
     output reg [N-1:0] data_read
 );
 
@@ -11,10 +11,10 @@ module rom #(
 
 
 //(* RAM_STYLE="BLOCK" *)
-reg [N-1:0] mem [SIZE-1:0];
+reg [N-1:0] mem [0:SIZE-1];
 
 initial begin
-  $readmemh("build/rom.hex", mem, 0, SIZE/4-1);
+  $readmemh("build/rom.hex", mem, 0, SIZE-1);
 end
 
 always @(negedge clk) begin