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Simple RISC-V CPU written in Verilog
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path:
root
/
prog
/
src
/
main.c
blob: 8bcdfe22fa33e3ce32d4acf70ea77efd92365dc2 (
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extern
void
test_prog
(
void
);
int
main
(
void
) {
test_prog
();
while
(
1
) {
}
}