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authorFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-05 15:01:46 +0200
committerFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-05 15:01:46 +0200
commit90a684ff92f68ec818349d1df626fcb06e8de2a1 (patch)
treed795baf38d56520f807a7f54252ce51b71061f45
parent5392b3d94038963a7121f391ad1b5075a5e32b8e (diff)
downloadriscv_cpu-90a684ff92f68ec818349d1df626fcb06e8de2a1.tar.gz
riscv_cpu-90a684ff92f68ec818349d1df626fcb06e8de2a1.zip
initialize rom to rom/rom.hex
-rw-r--r--rom/rom.hex0
-rw-r--r--src/memory_unit.v1
-rw-r--r--src/ram.v8
-rw-r--r--src/rom.v15
4 files changed, 17 insertions, 7 deletions
diff --git a/rom/rom.hex b/rom/rom.hex
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/rom/rom.hex
diff --git a/src/memory_unit.v b/src/memory_unit.v
index 7eb435b..b07c895 100644
--- a/src/memory_unit.v
+++ b/src/memory_unit.v
@@ -23,7 +23,6 @@ ram #(.N(N), .SIZE(1024)) ram(
rom #(.N(N), .SIZE(1024)) rom(
.clk(clk),
- .rst(rst),
.addr(addr[N-17:0]),
.data_read(data_read_rom)
);
diff --git a/src/ram.v b/src/ram.v
index b7e4c80..f92c66f 100644
--- a/src/ram.v
+++ b/src/ram.v
@@ -12,18 +12,18 @@ module ram #(
`include "include/log2.vh"
-reg [8:0] ram_block [SIZE-1:0];
+reg [8:0] memory [SIZE-1:0];
integer i;
always @(posedge clk or posedge rst) begin
if (rst) begin
for (i = 0; i < SIZE; i = i + 1)
- ram_block[i] <= 0;
+ memory[i] <= 0;
end else begin
if (we) begin
- ram_block[addr] = data_write;
+ memory[addr] = data_write;
end
- data_read = ram_block[addr];
+ data_read = memory[addr];
end
end
diff --git a/src/rom.v b/src/rom.v
index 90a9846..c85335b 100644
--- a/src/rom.v
+++ b/src/rom.v
@@ -3,11 +3,22 @@ module rom #(
parameter SIZE = 1024
)(
input clk,
- input rst,
input [log2(SIZE)-1:0] addr,
- output [N-1:0] data_read
+ output reg [N-1:0] data_read
);
`include "include/log2.vh"
+reg [7:0] memory [SIZE-1:0];
+
+initial begin
+ $readmemh("rom/rom.hex", memory);
+end
+
+always @(posedge clk) begin
+ data_read = memory[addr];
+end
+
+
+
endmodule