| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | .gitignore | 6 | logplain |
| -rw-r--r-- | Makefile | 1979 | logplain |
| d--------- | constraints | 42 | logplain |
| d--------- | sim | 39 | logplain |
| d--------- | src | 33 | logplain |
 |
index : riscv_cpu.git | |
| Simple RISC-V CPU written in Verilog |
| aboutsummaryrefslogtreecommitdiff |