| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | .gitignore | 6 | logplain |
| -rw-r--r-- | Makefile | 3769 | logplain |
| -rw-r--r-- | README.md | 417 | logplain |
| d--------- | cst | 42 | logplain |
| d--------- | gentestvec | 44 | logplain |
| d--------- | sim | 43 | logplain |
| d--------- | src | 234 | logplain |
 |
index : riscv_cpu.git | |
| Simple RISC-V CPU written in Verilog |
| aboutsummaryrefslogtreecommitdiff |