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-rw-r--r--src/ram.v17
1 files changed, 7 insertions, 10 deletions
diff --git a/src/ram.v b/src/ram.v
index 3e5783d..91bb133 100644
--- a/src/ram.v
+++ b/src/ram.v
@@ -3,24 +3,21 @@ module ram #(
parameter SIZE = 1024
)(
input clk,
- input rst,
+ input rstn,
input we,
- input [log2(SIZE)-1:0] addr,
+ input [log2(SIZE/4)-1:0] addr,
input [N-1:0] data_write,
- output [N-1:0] data_read
+ output reg [N-1:0] data_read
);
`include "include/log2.vh"
-reg [8:0] memory [SIZE-1:0];
-
-assign data_read = { memory[addr + 3], memory[addr + 2], memory[addr + 1], memory[addr + 0] };
-
+//(* RAM_STYLE="BLOCK" *)
+reg [N-1:0] mem [SIZE-1:0];
always @(posedge clk) begin
- if (we) begin
- { memory[addr + 3], memory[addr + 2], memory[addr + 1], memory[addr + 0] } <= data_write;
- end
+ if (we) mem[addr >> 2] <= data_write;
+ data_read <= mem[addr >> 2];
end
endmodule