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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
| commit | cb0be9e2039569ee7d18657e8f675d1f8369b407 (patch) | |
| tree | 91fa71b3960d1ad5217759371143efbdd833d475 /src/ram.v | |
| parent | 98d0dd96611dc2c0e444eaf9410f8adf2924c6b5 (diff) | |
| download | riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.tar.gz riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.zip | |
restructured project
Diffstat (limited to 'src/ram.v')
| -rw-r--r-- | src/ram.v | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/src/ram.v b/src/ram.v deleted file mode 100644 index 541096e..0000000 --- a/src/ram.v +++ /dev/null @@ -1,23 +0,0 @@ -module ram #( - parameter N = 32, - parameter SIZE = 1024 -)( - input clk, - input rstn, - input we, - input [N-1:0] addr, - input [N-1:0] data_write, - output reg [N-1:0] data_read -); - -`include "include/log2.vh" - -//(* RAM_STYLE="BLOCK" *) -reg [N-1:0] mem [0:SIZE-1]; - -always @(posedge clk) begin - if (we) mem[addr >> 2] <= data_write; - data_read <= mem[addr >> 2]; -end - -endmodule |