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authorFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-08 11:39:56 +0200
committerFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-08 11:39:56 +0200
commitd1133b1f41d426482cb54b747caada8427654b3a (patch)
tree10cd12c7df707967d8ddff8d0a7d98f646e75b86 /src/cpu.v
parentaa005bc8b667668eb43c0ae62e00aefd1c3c1af5 (diff)
downloadriscv_cpu-d1133b1f41d426482cb54b747caada8427654b3a.tar.gz
riscv_cpu-d1133b1f41d426482cb54b747caada8427654b3a.zip
fixed bug where register addresses were used instead of data
Diffstat (limited to 'src/cpu.v')
-rw-r--r--src/cpu.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu.v b/src/cpu.v
index b839477..5362cf9 100644
--- a/src/cpu.v
+++ b/src/cpu.v
@@ -123,8 +123,8 @@ always @ (posedge clk or posedge rst) begin
a_buf <= 32'b0;
b_buf <= 32'b0;
end else begin
- a_buf <= rs1;
- b_buf <= rs2;
+ a_buf <= rs1_data;
+ b_buf <= rs2_data;
end
end