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author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-13 17:48:26 +0200 |
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committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-13 17:48:26 +0200 |
commit | 9c7d7fd782f70d99120ce6ac45a897606b52c878 (patch) | |
tree | a6f36fed8ec3e42e08d51afee500190af8194df4 /src/alu.v | |
parent | 05366e24d8b3cfca4b856b1b3740d535cbdf7dd7 (diff) | |
download | riscv_cpu-9c7d7fd782f70d99120ce6ac45a897606b52c878.tar.gz riscv_cpu-9c7d7fd782f70d99120ce6ac45a897606b52c878.zip |
refactoring constants
Diffstat (limited to 'src/alu.v')
-rw-r--r-- | src/alu.v | 10 |
1 files changed, 6 insertions, 4 deletions
@@ -31,12 +31,14 @@ shift_unit su ( .result(shift_result) ); +`include "include/consts.vh" + always @ (*) begin case (op[3:2]) - 2'b00: result <= arithmetic_result; // ARITHMETIC - 2'b01: result <= logic_result; // LOGIC - 2'b10: result <= shift_result; // SHIFT - default: result <= 31'b0; + ALU_OP_ARITHMETIC: result <= arithmetic_result; // ARITHMETIC + ALU_OP_LOGIC: result <= logic_result; // LOGIC + ALU_OP_SHIFT: result <= shift_result; // SHIFT + default: result <= 31'b0; endcase end |