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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 15:57:42 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 15:57:42 +0200 |
| commit | ee94c97e4f8208d0c7404887cda16d00f67c6f1f (patch) | |
| tree | c31a0cc782e66d6bf68d82f684c1e5e167dab968 /sim | |
| parent | 99a50ce584cd29bcef7ed31cb9d933d0ae2e61ee (diff) | |
| download | riscv_cpu-ee94c97e4f8208d0c7404887cda16d00f67c6f1f.tar.gz riscv_cpu-ee94c97e4f8208d0c7404887cda16d00f67c6f1f.zip | |
comments
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/testbenches/src/testbench_cpu.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/testbenches/src/testbench_cpu.v b/sim/testbenches/src/testbench_cpu.v index ba40dc2..7c7ec67 100644 --- a/sim/testbenches/src/testbench_cpu.v +++ b/sim/testbenches/src/testbench_cpu.v @@ -1,6 +1,6 @@ `timescale 1ns / 1ps -module testbench_register_file(); +module testbench_cpu(); reg clk; reg rst; @@ -41,7 +41,7 @@ end initial begin $dumpfile(waveform_filename); - $dumpvars(0,testbench_register_file); + $dumpvars(0,testbench_cpu); end |