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author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
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committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
commit | cb0be9e2039569ee7d18657e8f675d1f8369b407 (patch) | |
tree | 91fa71b3960d1ad5217759371143efbdd833d475 /rtl/src/top.v | |
parent | 98d0dd96611dc2c0e444eaf9410f8adf2924c6b5 (diff) | |
download | riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.tar.gz riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.zip |
restructured project
Diffstat (limited to 'rtl/src/top.v')
-rw-r--r-- | rtl/src/top.v | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/rtl/src/top.v b/rtl/src/top.v new file mode 100644 index 0000000..b10fbca --- /dev/null +++ b/rtl/src/top.v @@ -0,0 +1,38 @@ +module top ( + input clk, + input key, + input rst, + output [5:0] led +); + +wire rstn, rstn_async, clk_cpu; +assign rstn_async = rst; + +wire [31:0] io_in; +wire [31:0] io_out; + +reset_synchronizer reset_synchronizer ( + .clk(clk), + .rstn_async(rstn_async), + .rstn(rstn) +); + +clock_divider #(.N(1)) clkdiv ( + .clk(clk), + .rstn(rstn), + .clk_div(clk_cpu) +); + +assign led[0] = ~clk_cpu; +assign led[5:1] = ~io_out[4:0]; +assign io_in[0] = key; + + +cpu cpu ( + .clk(clk_cpu), + .rstn(rstn), + .io_in(io_in), + .io_out(io_out) +); + +endmodule |