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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
| commit | cb0be9e2039569ee7d18657e8f675d1f8369b407 (patch) | |
| tree | 91fa71b3960d1ad5217759371143efbdd833d475 /rtl/src/rom.v | |
| parent | 98d0dd96611dc2c0e444eaf9410f8adf2924c6b5 (diff) | |
| download | riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.tar.gz riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.zip | |
restructured project
Diffstat (limited to 'rtl/src/rom.v')
| -rw-r--r-- | rtl/src/rom.v | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/rtl/src/rom.v b/rtl/src/rom.v new file mode 100644 index 0000000..29de1da --- /dev/null +++ b/rtl/src/rom.v @@ -0,0 +1,25 @@ +module rom #( + parameter N = 32, + parameter SIZE = 1024, + parameter ROM_FILE = "../../build/rom.hex" +)( + input clk, + input [N-1:0] addr, + output reg [N-1:0] data_read +); + +`include "include/log2.vh" + + +//(* RAM_STYLE="BLOCK" *) +reg [N-1:0] mem [0:SIZE-1]; + +initial begin + $readmemh(ROM_FILE, mem, 0, SIZE-1); +end + +always @(negedge clk) begin + data_read <= mem[addr >> 2]; +end + +endmodule |