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author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
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committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-21 13:50:28 +0200 |
commit | cb0be9e2039569ee7d18657e8f675d1f8369b407 (patch) | |
tree | 91fa71b3960d1ad5217759371143efbdd833d475 /rtl/src/result_mux.v | |
parent | 98d0dd96611dc2c0e444eaf9410f8adf2924c6b5 (diff) | |
download | riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.tar.gz riscv_cpu-cb0be9e2039569ee7d18657e8f675d1f8369b407.zip |
restructured project
Diffstat (limited to 'rtl/src/result_mux.v')
-rw-r--r-- | rtl/src/result_mux.v | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/rtl/src/result_mux.v b/rtl/src/result_mux.v new file mode 100644 index 0000000..3c94617 --- /dev/null +++ b/rtl/src/result_mux.v @@ -0,0 +1,22 @@ +module result_mux ( + input [31:0] src_alu_result, + input [31:0] src_alu_result_buf, + input [31:0] src_data_buf, + + input [1:0] result_src, + + output reg [31:0] result +); + +`include "include/consts.vh" + +always @(*) begin + case (result_src) + RESULT_SRC_DATA_BUF: result = src_data_buf; + RESULT_SRC_ALU_RESULT_BUF: result = src_alu_result_buf; + RESULT_SRC_ALU_RESULT: result = src_alu_result; + default: result = 32'b0; + endcase +end + +endmodule |