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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-23 07:04:37 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-23 07:04:37 +0200 |
| commit | c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469 (patch) | |
| tree | a000085f4ce8d6dec3e90ecc230642eeb77d960f /rtl/src/alu_op_decode.v | |
| parent | ee94c97e4f8208d0c7404887cda16d00f67c6f1f (diff) | |
| download | riscv_cpu-c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469.tar.gz riscv_cpu-c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469.zip | |
align
Diffstat (limited to 'rtl/src/alu_op_decode.v')
| -rw-r--r-- | rtl/src/alu_op_decode.v | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/rtl/src/alu_op_decode.v b/rtl/src/alu_op_decode.v index 0e985eb..0866bbe 100644 --- a/rtl/src/alu_op_decode.v +++ b/rtl/src/alu_op_decode.v @@ -5,11 +5,11 @@ // the next address of the pc. module alu_op_decode ( - input [6:0] opcode, - input [2:0] funct3, - input [6:0] funct7, + input [6:0] opcode, + input [2:0] funct3, + input [6:0] funct7, - input alu_ctrl, + input alu_ctrl, output reg [3:0] alu_op ); @@ -18,7 +18,7 @@ module alu_op_decode ( always @ (*) begin if (alu_ctrl == ALU_CTRL_ADD) begin - alu_op = ALU_OP_ADD; + alu_op = ALU_OP_ADD; end else if (opcode == OPCODE_REG || opcode == OPCODE_IMM) begin // instruction is of r-type or i-type case (funct3) FUNCT3_ALU_ADD_SUB: alu_op = (opcode == OPCODE_REG && funct7 == FUNCT7_ALU_SUB) ? ALU_OP_SUB : ALU_OP_ADD; @@ -45,7 +45,7 @@ always @ (*) begin default: alu_op = ALU_OP_ADD; endcase end else begin - alu_op = ALU_OP_ADD; + alu_op = ALU_OP_ADD; end end |