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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-23 07:04:37 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-23 07:04:37 +0200 |
| commit | c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469 (patch) | |
| tree | a000085f4ce8d6dec3e90ecc230642eeb77d960f /rtl/src/alu_b_src_mux.v | |
| parent | ee94c97e4f8208d0c7404887cda16d00f67c6f1f (diff) | |
| download | riscv_cpu-c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469.tar.gz riscv_cpu-c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469.zip | |
align
Diffstat (limited to 'rtl/src/alu_b_src_mux.v')
| -rw-r--r-- | rtl/src/alu_b_src_mux.v | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/rtl/src/alu_b_src_mux.v b/rtl/src/alu_b_src_mux.v index 5f188bc..7730225 100644 --- a/rtl/src/alu_b_src_mux.v +++ b/rtl/src/alu_b_src_mux.v @@ -2,10 +2,10 @@ // Selects source for alu input b. module alu_b_src_mux ( - input [31:0] src_rd2_buf, - input [31:0] src_imm, + input [31:0] src_rd2_buf, + input [31:0] src_imm, - input [1:0] alu_b_src, + input [1:0] alu_b_src, output reg [31:0] alu_b ); |