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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-08 10:55:45 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-08 10:55:45 +0200 |
| commit | aa005bc8b667668eb43c0ae62e00aefd1c3c1af5 (patch) | |
| tree | a491b20a750cf0dac413aa10deb2ead3b6266fc3 /prog/link.ld | |
| parent | 80fee7a2db703f029989c40e823c2ccdeb078fca (diff) | |
| download | riscv_cpu-aa005bc8b667668eb43c0ae62e00aefd1c3c1af5.tar.gz riscv_cpu-aa005bc8b667668eb43c0ae62e00aefd1c3c1af5.zip | |
assemble simple rom
Diffstat (limited to 'prog/link.ld')
| -rw-r--r-- | prog/link.ld | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/prog/link.ld b/prog/link.ld new file mode 100644 index 0000000..98658c3 --- /dev/null +++ b/prog/link.ld @@ -0,0 +1,16 @@ +OUTPUT_ARCH( "riscv" ) +ENTRY(_start) + +MEMORY +{ + ROM (rx) : ORIGIN = 0x00010000, LENGTH = 0xF0000 # 0x0001_0000 - 0x000F_FFFF + RAM (rwx) : ORIGIN = 0x00100000, LENGTH = 0xFEFFFFF # 0x0010_0000 - 0xFF0F_FFFF +} + +SECTIONS +{ + .text : { *(.text) } > ROM + .data : { *(.data) } > RAM + .bss : { *(.bss) } > RAM + .stack : { *(.stack) } > RAM +} |