initial commit

4 files changed, 116 insertions, 0 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..378eac2
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+build
diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..8a4049e
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,56 @@
+PROJ_NAME = riscv_cpu
+TOP_MODULE = top
+
+SRC_DIR = src
+CONSTRAINTS_DIR = constraints
+
+SOURCES = $(wildcard $(SRC_DIR)/*.v)
+CONSTRAINTS = $(CONSTRAINTS_DIR)/tangnano9k.cst
+
+BUILD_DIR = build
+BITSTREAM = $(BUILD_DIR)/$(PROJ_NAME).fs
+
+YOSYS = yosys
+NEXTPNR = nextpnr-gowin
+GOWIN_PACK = gowin_pack
+PROGRAMMER = openFPGALoader
+
+FAMILY = GW1N-9C
+DEVICE = GW1NR-LV9QN88PC6/I5
+BOARD = tangnano9k
+
+all: $(BITSTREAM)
+
+$(BUILD_DIR)/$(PROJ_NAME).json: $(SOURCES)
+	@echo "=================================================="
+	@echo "Synthesizing"
+	@echo "=================================================="
+	
+	@mkdir -p $(BUILD_DIR)
+	$(YOSYS) -p "synth_gowin -top $(TOP_MODULE)" -o $(BUILD_DIR)/$(PROJ_NAME).json $(SOURCES)
+	
+$(BUILD_DIR)/$(PROJ_NAME)_pnr.json: $(BUILD_DIR)/$(PROJ_NAME).json $(CONSTRAINTS)
+	@echo "=================================================="
+	@echo "Routing"
+	@echo "=================================================="
+
+	$(NEXTPNR) --json $(BUILD_DIR)/$(PROJ_NAME).json --write $(BUILD_DIR)/$(PROJ_NAME)_pnr.json --device $(DEVICE) --family $(FAMILY) --cst $(CONSTRAINTS)
+
+$(BITSTREAM): $(BUILD_DIR)/$(PROJ_NAME)_pnr.json
+	@echo "=================================================="
+	@echo "Generating Bitstream"
+	@echo "=================================================="
+
+	$(GOWIN_PACK) -d $(FAMILY) -o $(BITSTREAM) $(BUILD_DIR)/$(PROJ_NAME)_pnr.json
+	
+program: $(BITSTREAM)
+	$(PROGRAMMER) -b $(BOARD) $(BITSTREAM)
+
+flash: $(BITSTREAM)
+	$(PROGRAMMER) -b $(BOARD) -f $(BITSTREAM)
+
+
+clean:
+	rm -rf $(BUILD_DIR)
+
+.PHONY: all program clean
diff --git a/constraints/tangnano9k.cst b/constraints/tangnano9k.cst
new file mode 100644
index 0000000..e909e36
--- /dev/null
+++ b/constraints/tangnano9k.cst
@@ -0,0 +1,38 @@
+//Part Number: GW1NR-LV9QN88PC6/I5
+
+IO_LOC "clk" 52;
+IO_LOC "led[0]" 10;
+IO_LOC "led[1]" 11;
+IO_LOC "led[2]" 13;
+IO_LOC "led[3]" 14;
+IO_LOC "led[4]" 15;
+IO_LOC "led[5]" 16;
+IO_LOC "key" 3;
+IO_LOC "rst" 4;
+
+IO_LOC "LCD_B[0]" 54;
+IO_LOC "LCD_B[1]" 53;
+IO_LOC "LCD_B[2]" 51;
+IO_LOC "LCD_B[3]" 42;
+IO_LOC "LCD_B[4]" 41;
+IO_LOC "LCD_CLK" 35;
+IO_LOC "LCD_DEN" 33;
+IO_LOC "LCD_G[0]" 70;
+IO_LOC "LCD_G[1]" 69;
+IO_LOC "LCD_G[2]" 68;
+IO_LOC "LCD_G[3]" 57;
+IO_LOC "LCD_G[4]" 56;
+IO_LOC "LCD_G[5]" 55;
+IO_LOC "LCD_HYNC" 40;
+IO_LOC "LCD_R[0]" 75;
+IO_LOC "LCD_R[1]" 74;
+IO_LOC "LCD_R[2]" 73;
+IO_LOC "LCD_R[3]" 72;
+IO_LOC "LCD_R[4]" 71;
+IO_LOC "LCD_SYNC" 34;
+IO_LOC "LCD_XR"   32;
+IO_LOC "LCD_XL"   39;
+
+
+// true LVDS pins
+IO_LOC "tlvds_p" 25,26;
diff --git a/src/top.v b/src/top.v
new file mode 100644
index 0000000..8dc9684
--- /dev/null
+++ b/src/top.v
@@ -0,0 +1,21 @@
+module top (
+	input clk,
+	input key,
+	output [5:0] led
+);
+
+reg [25:0] ctr_q;
+wire [25:0] ctr_d;
+
+// Sequential code (flip-flop)
+always @(posedge clk) begin
+	if (key) begin
+		ctr_q <= ctr_d;
+	end
+end
+
+// Combinational code (boolean logic)
+assign ctr_d = ctr_q + 1'b1;
+assign led = ctr_q[25:20];
+
+endmodule