1 files changed, 14 insertions, 15 deletions

diff --git a/src/control_unit.v b/src/control_unit.v
index 7ca2cb2..09129bd 100644
--- a/src/control_unit.v
+++ b/src/control_unit.v
@@ -4,7 +4,6 @@ module control_unit (
  input [2:0] funct3,
  input [6:0] funct7,
  input alu_zero,
- input alu_equal,
  output pc_we,
  output reg mem_addr_src,
  output reg mem_we,
@@ -27,7 +26,7 @@ parameter s00_fetch     = 4'h0,
           s08_execute_i = 4'h8,
           s09_jal       = 4'h9,
           s10_jalr      = 4'ha,
-          s11_beq       = 4'hb;
+          s11_br        = 4'hb;
 
 reg [3:0] state, next_state;
 
@@ -46,7 +45,7 @@ always @ (*) begin
       7'b0010011:  next_state <= s08_execute_i;
       7'b1101111:  next_state <= s09_jal;
       7'b1100111:  next_state <= s10_jalr;
-      7'b1100011:  next_state <= s11_beq;
+      7'b1100011:  next_state <= s11_br;
       
     endcase
     s02_mem_addr:  case(opcode)
@@ -61,15 +60,15 @@ always @ (*) begin
     s08_execute_i: next_state <= s07_alu_wb;
     s09_jal:       next_state <= s07_alu_wb;
     s10_jalr:      next_state <= s07_alu_wb;
-    s11_beq:       next_state <= s00_fetch;
+    s11_br:       next_state <= s00_fetch;
   endcase
 end
 
 reg branch;
 reg pc_update;
-reg [1:0] alu_ctrl;
+reg alu_ctrl;
 
-assign pc_we = (alu_zero & branch) | pc_update;
+assign pc_we = ((alu_zero ^ funct3[0] ^ funct3[2]) & branch) | pc_update;
 
 
 always @ (*) begin
@@ -84,19 +83,19 @@ always @ (*) begin
       instr_we      = 1'b1;
       alu_a_src    <= 2'b00;
       alu_b_src    <= 2'b10;
-      alu_ctrl     <= 2'b00;
+      alu_ctrl     <= 1'b1;
       result_src   <= 2'b10;
       pc_update     = 1'b1;
     end
     s01_decode: begin
       alu_a_src <= 2'b01;
       alu_b_src <= 2'b01;
-      alu_ctrl  <= 2'b00;
+      alu_ctrl  <= 1'b1;
     end
     s02_mem_addr: begin
       alu_a_src <= 2'b10;
       alu_b_src <= 2'b01;
-      alu_ctrl  <= 2'b00;
+      alu_ctrl  <= 1'b1;
     end
     s03_mem_read: begin
       result_src   <= 2'b00;
@@ -114,7 +113,7 @@ always @ (*) begin
     s06_execute_r: begin
       alu_a_src <= 2'b10;
       alu_b_src <= 2'b00;
-      alu_ctrl  <= 2'b10;
+      alu_ctrl  <= 1'b0;
     end
     s07_alu_wb: begin
       result_src <= 2'b00;
@@ -123,26 +122,26 @@ always @ (*) begin
     s08_execute_i: begin
       alu_a_src <= 2'b10;
       alu_b_src <= 2'b01;
-      alu_ctrl  <= 2'b10;
+      alu_ctrl  <= 1'b0;
     end
     s09_jal: begin
       alu_a_src  <= 2'b01;
       alu_b_src  <= 2'b10;
-      alu_ctrl   <= 2'b00;
+      alu_ctrl   <= 1'b1;
       result_src <= 2'b00;
       pc_update   = 1'b1;
     end
     s10_jalr: begin
       alu_a_src  <= 2'b10;
       alu_b_src  <= 2'b01;
-      alu_ctrl   <= 2'b00;
+      alu_ctrl   <= 1'b1;
       result_src <= 2'b10;
       pc_update   = 1'b1;
     end
-    s11_beq: begin
+    s11_br: begin
       alu_a_src  <= 2'b10;
       alu_b_src  <= 2'b00;
-      alu_ctrl   <= 2'b01;
+      alu_ctrl   <= 1'b0;
       result_src <= 2'b00;
       branch      = 1'b1;
     end