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-rw-r--r--src/arithmetic_unit.v22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/arithmetic_unit.v b/src/arithmetic_unit.v
index 64ec0f9..71255c2 100644
--- a/src/arithmetic_unit.v
+++ b/src/arithmetic_unit.v
@@ -1,23 +1,23 @@
module arithmetic_unit #(
parameter N = 32
)(
- input [N-1:0] A, B,
- input [1:0] OP, // 00: ADD, 01: SUB, 11: SLT
- output [N-1:0] RESULT
+ input [N-1:0] au_src0, au_src1,
+ input [1:0] au_op, // 00: ADD, 01: SUB, 11: SLT
+ output [N-1:0] au_result
);
-wire [N-1:0] b, sum;
-wire cin, altb, overflow;
+wire [N-1:0] au_src1_inv, au_sum;
+wire au_cin, au_src0_lt_src1, au_overflow;
-assign b = OP[0] ? ~B : B;
-assign cin = OP[0];
+assign au_src1_inv = au_op[0] ? ~au_src1 : au_src1;
+assign au_cin = au_op[0];
-assign sum = A + b + cin;
+assign au_sum = au_src0 + au_src1_inv + au_cin;
-assign overflow = ~(A[N-1] ^ B[N-1] ^ OP[0]) & (A[N-1] ^ sum[N-1]);
+assign au_overflow = ~(au_src0[N-1] ^ au_src1[N-1] ^ au_op[0]) & (au_src0[N-1] ^ au_sum[N-1]);
-assign altb = overflow ^ sum[N-1];
+assign au_src0_lt_src1 = au_overflow ^ au_sum[N-1];
-assign RESULT = OP[1] ? {{(N-1){1'b0}}, altb} : sum;
+assign au_result = au_op[1] ? {{(N-1){1'b0}}, au_src0_lt_src1} : au_sum;
endmodule