diff options
Diffstat (limited to 'src/alu_op_decode.v')
| -rw-r--r-- | src/alu_op_decode.v | 99 |
1 files changed, 28 insertions, 71 deletions
diff --git a/src/alu_op_decode.v b/src/alu_op_decode.v index 4a812ab..0e217ec 100644 --- a/src/alu_op_decode.v +++ b/src/alu_op_decode.v @@ -8,79 +8,36 @@ module alu_op_decode ( output reg [3:0] alu_op ); -parameter ALU_OP_ADD = 4'b0000, - ALU_OP_SUB = 4'b0001, - ALU_OP_SLT = 4'b0010, - ALU_OP_SLTU = 4'b0011, - ALU_OP_AND = 4'b0100, - ALU_OP_OR = 4'b0101, - ALU_OP_XOR = 4'b0110, - ALU_OP_SLL = 4'b1000, - ALU_OP_SRL = 4'b1001, - ALU_OP_SRA = 4'b1011; - +`include "include/consts.vh" always @ (*) begin - if (alu_ctrl == 1'b1) alu_op <= ALU_OP_ADD; - else case (opcode) - 7'b0110011: begin // ADD, SUB, SLL, SLT, SLTU, XOR, SRL, SRA, OR, AND - case (funct3) - 3'b000: alu_op <= funct7[5] ? ALU_OP_SUB : ALU_OP_ADD; - 3'b001: alu_op <= ALU_OP_SLL; - 3'b010: alu_op <= ALU_OP_SLT; - 3'b011: alu_op <= ALU_OP_SLTU; - 3'b100: alu_op <= ALU_OP_XOR; - 3'b101: alu_op <= funct7[5] ? ALU_OP_SRA : ALU_OP_SRL; - 3'b110: alu_op <= ALU_OP_OR; - 3'b111: alu_op <= ALU_OP_AND; - default: alu_op <= ALU_OP_ADD; - endcase - end - 7'b0010011: begin // ADDI, SLTI, SLTIU, XORI, ORI, ANDI, SLLI, SRLI, SRAI - case (funct3) - 3'b000: alu_op <= ALU_OP_ADD; - 3'b001: alu_op <= ALU_OP_SLL; - 3'b010: alu_op <= ALU_OP_SLT; - 3'b011: alu_op <= ALU_OP_SLTU; - 3'b100: alu_op <= ALU_OP_XOR; - 3'b101: alu_op <= funct7[5] ? ALU_OP_SRA : ALU_OP_SRL; - 3'b110: alu_op <= ALU_OP_OR; - 3'b111: alu_op <= ALU_OP_AND; - default: alu_op <= ALU_OP_ADD; - endcase - end - 7'b0000011: begin // LB, LH, LW, LBU, LHU - alu_op <= ALU_OP_ADD; - end - 7'b1100111: begin // JALR - alu_op <= ALU_OP_ADD; - end - 7'b0100011: begin // SB, SH, SW - alu_op <= ALU_OP_ADD; - end - 7'b1100011: begin // BEQ, BNE, BLT, BGE, BLTU, BGEU - if ((funct3 == 3'b000) | (funct3 == 3'b001)) alu_op <= ALU_OP_SUB; - else if ((funct3 == 3'b100) | (funct3 == 3'b101)) alu_op <= ALU_OP_SLT; - else if ((funct3 == 3'b110) | (funct3 == 3'b111)) alu_op <= ALU_OP_SLTU; - else alu_op <= ALU_OP_ADD; - end - 7'b0110111: begin // LUI - alu_op <= ALU_OP_ADD; - end - 7'b0010111: begin // AUIPC - alu_op <= ALU_OP_ADD; - end - 7'b1101111: begin // JAL - alu_op <= ALU_OP_ADD; - end - 7'b0001111: begin // FENCE, FENCE.I - alu_op <= ALU_OP_ADD; - end - 7'b1110011: begin // ECALL, EBREAK, CSRRW, CSRRS, CSRRC, CSRRWI, CSRRSI, CSRRCI - alu_op <= ALU_OP_ADD; - end - default: alu_op <= ALU_OP_ADD; - endcase + if (alu_ctrl == ALU_CTRL_ADD) begin + alu_op <= ALU_OP_ADD; + end else if (opcode == OPCODE_REG || opcode == OPCODE_IMM) begin + case (funct3) + FUNCT3_ALU_ADD_SUB: alu_op <= (opcode == OPCODE_REG || funct7 == FUNCT7_ALU_SUB) ? ALU_OP_SUB : ALU_OP_ADD; + FUNCT3_ALU_SLL: alu_op <= ALU_OP_SLL; + FUNCT3_ALU_SLT: alu_op <= ALU_OP_SLT; + FUNCT3_ALU_SLTU: alu_op <= ALU_OP_SLTU; + FUNCT3_ALU_XOR: alu_op <= ALU_OP_XOR; + FUNCT3_ALU_SR: alu_op <= funct7 == FUNCT7_ALU_SRL ? ALU_OP_SRL : ALU_OP_SRA; + FUNCT3_ALU_OR: alu_op <= ALU_OP_OR; + FUNCT3_ALU_AND: alu_op <= ALU_OP_AND; + default: alu_op <= ALU_OP_ADD; + endcase + end else if (opcode == OPCODE_BRANCH) begin + case (funct3) + FUNCT3_BRANCH_BEQ: alu_op <= ALU_OP_SUB; + FUNCT3_BRANCH_BNE: alu_op <= ALU_OP_SUB; + FUNCT3_BRANCH_BLT: alu_op <= ALU_OP_SLT; + FUNCT3_BRANCH_BGE: alu_op <= ALU_OP_SLT; + FUNCT3_BRANCH_BLTU: alu_op <= ALU_OP_SLTU; + FUNCT3_BRANCH_BGEU: alu_op <= ALU_OP_SLTU; + default: alu_op <= ALU_OP_ADD; + endcase + end else begin + alu_op <= ALU_OP_ADD; + end end endmodule |