1 files changed, 5 insertions, 5 deletions
diff --git a/sim/testbench_alu.v b/sim/testbench_alu.v
index 7d67d5c..068efc3 100644
--- a/sim/testbench_alu.v
+++ b/sim/testbench_alu.v
@@ -76,11 +76,11 @@ module testbench_alu();
   
 
   alu #(.N(32)) alu (
-    .A(a),
-    .B(b),
-    .OP(op),
-    .RESULT(result),
-    .ZERO(zero)
+    .alu_src0(a),
+    .alu_src1(b),
+    .alu_op(op),
+    .alu_result(result),
+    .alu_zero(zero)
   );
 
 endmodule