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Diffstat (limited to 'rtl/src/alu_op_decode.v')
-rw-r--r--rtl/src/alu_op_decode.v13
1 files changed, 11 insertions, 2 deletions
diff --git a/rtl/src/alu_op_decode.v b/rtl/src/alu_op_decode.v
index 4523255..0e985eb 100644
--- a/rtl/src/alu_op_decode.v
+++ b/rtl/src/alu_op_decode.v
@@ -1,3 +1,9 @@
+// alu op decode:
+// Decodes instruction to corresponding alu_op if alu_ctrl is set to ALU_CTRL_OP
+// otherwise, if it is ALU_CTRL_ADD, then its sets alu_op to ALU_OP_ADD.
+// This is used if the cpu needs to add two values for example to calculate
+// the next address of the pc.
+
module alu_op_decode (
input [6:0] opcode,
input [2:0] funct3,
@@ -13,7 +19,7 @@ module alu_op_decode (
always @ (*) begin
if (alu_ctrl == ALU_CTRL_ADD) begin
alu_op = ALU_OP_ADD;
- end else if (opcode == OPCODE_REG || opcode == OPCODE_IMM) begin
+ end else if (opcode == OPCODE_REG || opcode == OPCODE_IMM) begin // instruction is of r-type or i-type
case (funct3)
FUNCT3_ALU_ADD_SUB: alu_op = (opcode == OPCODE_REG && funct7 == FUNCT7_ALU_SUB) ? ALU_OP_SUB : ALU_OP_ADD;
FUNCT3_ALU_SLL: alu_op = ALU_OP_SLL;
@@ -25,12 +31,15 @@ always @ (*) begin
FUNCT3_ALU_AND: alu_op = ALU_OP_AND;
default: alu_op = ALU_OP_ADD;
endcase
- end else if (opcode == OPCODE_BRANCH) begin
+ end else if (opcode == OPCODE_BRANCH) begin // instruction is of b-type
case (funct3)
+ // compare equality
FUNCT3_BRANCH_BEQ: alu_op = ALU_OP_SUB;
FUNCT3_BRANCH_BNE: alu_op = ALU_OP_SUB;
+ // compare signed
FUNCT3_BRANCH_BLT: alu_op = ALU_OP_SLT;
FUNCT3_BRANCH_BGE: alu_op = ALU_OP_SLT;
+ // compare unsigned
FUNCT3_BRANCH_BLTU: alu_op = ALU_OP_SLTU;
FUNCT3_BRANCH_BGEU: alu_op = ALU_OP_SLTU;
default: alu_op = ALU_OP_ADD;