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author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-01 13:42:07 +0200 |
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committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-01 13:42:07 +0200 |
commit | 51b0a4c850fbf0ed70abe694be143b2b10e3e578 (patch) | |
tree | b6fbdefdc63d2e13e950a298e3533aabbba101cf /tests/generate_alu_tests.c | |
parent | 766273a6a50d57777e455d07a015300255becb6d (diff) | |
download | riscv_cpu-51b0a4c850fbf0ed70abe694be143b2b10e3e578.tar.gz riscv_cpu-51b0a4c850fbf0ed70abe694be143b2b10e3e578.zip |
generate alu tests
Diffstat (limited to 'tests/generate_alu_tests.c')
-rw-r--r-- | tests/generate_alu_tests.c | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/tests/generate_alu_tests.c b/tests/generate_alu_tests.c new file mode 100644 index 0000000..ebd2223 --- /dev/null +++ b/tests/generate_alu_tests.c @@ -0,0 +1,96 @@ +#include <stdio.h> +#include <stdlib.h> +#include <time.h> +#include <stdbool.h> + +typedef enum { + ADD = 0b0000, + SUB = 0b0001, + SLT = 0b0011, + + AND = 0b0100, + OR = 0b0101, + XOR = 0b0110, + + SLL = 0b1000, + SRL = 0b1001, + SRA = 0b1011, +} OP; + + +void test_op(OP op, uint32_t a, uint32_t b) { + uint32_t result; + bool overflow = false; + bool zero; + + switch (op) { + case ADD: result = a + b; overflow = result < b; break; + case SUB: result = a - b; overflow = a < b; break; + case SLT: result = a < b; break; + + case AND: result = a & b; break; + case OR: result = a | b; break; + case XOR: result = a ^ b; break; + + case SLL: result = a << b; break; + case SRL: result = a >> b; break; + case SRA: result = ((int32_t) a) >> b; break; + } + + zero = result == 0; + + printf("%01X__%08X_%08X__%08X_%01X\n", op & 0x0f, a, b, result, (overflow << 1) | zero); +} + +void test_op_random(OP op, int num) { + for (int i = 0; i < num; ++i) { + uint32_t a = (rand() << 16) | rand(); + uint32_t b = (rand() << 16) | rand(); + test_op(op, a, b); + } +} + +int main(int argc, const char * argv[]) { + srand(time(NULL)); + + test_op_random(ADD, 1000); + test_op(ADD, 0x00000000, 0x00000000); + test_op(ADD, 0xffffffff, 0xffffffff); + test_op(ADD, 0xffffffff, 0x00000001); + test_op_random(SUB, 1000); + test_op(SUB, 0xffffffff, 0xffffffff); + test_op_random(SLT, 1000); + test_op(SLT, 0x8fffffff, 0xffffffff); + test_op(SLT, 0xffffffff, 0x00000001); + test_op(SLT, 0x00000001, 0xffffffff); + + test_op_random(OR, 1000); + test_op(OR, 0x00000000, 0x00000000); + test_op(OR, 0xffffffff, 0x00000000); + test_op(OR, 0x00000000, 0xffffffff); + test_op(OR, 0xffffffff, 0xffffffff); + test_op_random(AND, 1000); + test_op(AND, 0x00000000, 0x00000000); + test_op(AND, 0xffffffff, 0x00000000); + test_op(AND, 0x00000000, 0xffffffff); + test_op(AND, 0xffffffff, 0xffffffff); + test_op_random(XOR, 1000); + test_op(XOR, 0x00000000, 0x00000000); + test_op(XOR, 0xffffffff, 0x00000000); + test_op(XOR, 0x00000000, 0xffffffff); + test_op(XOR, 0xffffffff, 0xffffffff); + + test_op_random(SLL, 1000); + test_op(SLL, 0x0000000f, 0x00000004); + test_op(SLL, 0xffffffff, 0x0000001c); + test_op(SLL, 0xf0000000, 0x00000002); + test_op(SLL, 0x01234567, 0x00000001); + test_op_random(SRL, 1000); + test_op(SRL, 0xf0000000, 0x0000001c); + test_op(SRL, 0x0000000f, 0x0000004); + test_op_random(SRA, 1000); + test_op(SRA, 0xf0000000, 0x0000001c); + test_op(SRA, 0x0000000f, 0x0000004); + + return 0; +} |