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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-20 16:48:55 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-20 16:48:55 +0200 |
| commit | e945c80a6ceaef501350de49bf647ae8539d1cbb (patch) | |
| tree | 9e698d839e5f6221af523b49be04b809648efeb9 /src/pc_reg.v | |
| parent | 142510b8325b9ef89bd3e22463f36c3caa2815de (diff) | |
| download | riscv_cpu-e945c80a6ceaef501350de49bf647ae8539d1cbb.tar.gz riscv_cpu-e945c80a6ceaef501350de49bf647ae8539d1cbb.zip | |
reset synchronizer
Diffstat (limited to 'src/pc_reg.v')
| -rw-r--r-- | src/pc_reg.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/pc_reg.v b/src/pc_reg.v index 2bdb540..11fe9ba 100644 --- a/src/pc_reg.v +++ b/src/pc_reg.v @@ -8,7 +8,7 @@ module pc_reg ( output reg [31:0] pc ); -parameter PC_INITIAL = 32'h0001_0000; +`include "include/consts.vh" always @ (posedge clk or negedge rstn) begin if (!rstn) pc <= PC_INITIAL; |