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authorFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-09 11:02:01 +0200
committerFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-09 11:02:01 +0200
commitd810d1cd42a31268ccb33993f1f1f429900c5ff8 (patch)
tree229311919524387d188752c4dcec730ecc115782 /src/cpu.v
parent678aef68af85c04015d8c385f6d6c60ffada7fad (diff)
downloadriscv_cpu-d810d1cd42a31268ccb33993f1f1f429900c5ff8.tar.gz
riscv_cpu-d810d1cd42a31268ccb33993f1f1f429900c5ff8.zip
added remaining branch instructions
Diffstat (limited to 'src/cpu.v')
-rw-r--r--src/cpu.v5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/cpu.v b/src/cpu.v
index 5362cf9..66ae8ce 100644
--- a/src/cpu.v
+++ b/src/cpu.v
@@ -12,7 +12,6 @@ wire pc_we;
wire instr_we;
wire rf_we;
wire alu_zero;
-wire alu_equal;
wire [3:0] alu_op;
wire [1:0] alu_a_src;
wire [1:0] alu_b_src;
@@ -25,7 +24,6 @@ control_unit cu (
.funct3(funct3),
.funct7(funct7),
.alu_zero(alu_zero),
- .alu_equal(alu_equal),
.pc_we(pc_we),
.mem_addr_src(mem_addr_src),
.mem_we(mem_we),
@@ -156,8 +154,7 @@ alu alu (
.b(b),
.op(alu_op),
.result(alu_result),
- .zero(alu_zero),
- .equal(alu_equal)
+ .zero(alu_zero)
);
reg [31:0] result_buf;