diff options
| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-12 21:27:41 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-12 21:27:41 +0200 |
| commit | deb7d0a6fc76d5250c238d479cf97d4755abef01 (patch) | |
| tree | 395c266ff4757e83e151d1286d6d2388e63d9a9c /src/alu_result_reg.v | |
| parent | 008059fbe4e960a10bb4c444013129e0aaa02818 (diff) | |
| download | riscv_cpu-deb7d0a6fc76d5250c238d479cf97d4755abef01.tar.gz riscv_cpu-deb7d0a6fc76d5250c238d479cf97d4755abef01.zip | |
refactoring
Diffstat (limited to 'src/alu_result_reg.v')
| -rw-r--r-- | src/alu_result_reg.v | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/alu_result_reg.v b/src/alu_result_reg.v new file mode 100644 index 0000000..b915bdb --- /dev/null +++ b/src/alu_result_reg.v @@ -0,0 +1,12 @@ +module alu_result_reg ( + input clk, rstn, + input [31:0] alu_result_in, + output reg [31:0] alu_result_buf +); + +always @ (posedge clk) begin + if (!rstn) alu_result_buf <= 32'b0; + else alu_result_buf <= alu_result_in; +end + +endmodule |