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| author | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-23 08:20:16 +0200 |
|---|---|---|
| committer | Flavian Kaufmann <flavian@flaviankaufmann.ch> | 2024-05-23 08:20:16 +0200 |
| commit | 6a9573628b3c7e537bd273a483be9abcfa2ee429 (patch) | |
| tree | acc804258af80527e3f606b709cb2fe8e36593a9 /rtl/src/memory_interface.v | |
| parent | c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469 (diff) | |
| download | riscv_cpu-6a9573628b3c7e537bd273a483be9abcfa2ee429.tar.gz riscv_cpu-6a9573628b3c7e537bd273a483be9abcfa2ee429.zip | |
mem size
Diffstat (limited to 'rtl/src/memory_interface.v')
| -rw-r--r-- | rtl/src/memory_interface.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/rtl/src/memory_interface.v b/rtl/src/memory_interface.v index 055016e..ebe2f22 100644 --- a/rtl/src/memory_interface.v +++ b/rtl/src/memory_interface.v @@ -8,6 +8,7 @@ module memory_interface ( input we, input [31:0] addr, input [31:0] wd, + input [2:0] size, output reg [31:0] rd, @@ -27,6 +28,7 @@ ram #(.SIZE(1024)) ram ( .rstn(rstn), .we(ram_we), .addr(rel_addr), + .size(size), .rd(ram_rd), .wd(wd) ); @@ -34,6 +36,7 @@ ram #(.SIZE(1024)) ram ( rom #(.SIZE(1024)) rom ( .clk(clk), .addr(rel_addr), + .size(size), .rd(rom_rd) ); @@ -42,6 +45,7 @@ io io ( .rstn(rstn), .we(io_we), .addr(rel_addr), + .size(size), .rd(io_rd), .wd(wd), .io_in(io_in), |