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authorFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-08 12:12:09 +0200
committerFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-08 12:12:09 +0200
commit7ff0d605067d57f638da50e53eb4a7dbb7ef11e6 (patch)
tree96b198b1e2d961d0ae713e086420a003b7307666
parentd1133b1f41d426482cb54b747caada8427654b3a (diff)
downloadriscv_cpu-7ff0d605067d57f638da50e53eb4a7dbb7ef11e6.tar.gz
riscv_cpu-7ff0d605067d57f638da50e53eb4a7dbb7ef11e6.zip
build assembly files
-rw-r--r--Makefile49
-rw-r--r--genrom/genrom.c10
-rwxr-xr-xprog/main.binbin16 -> 0 bytes
-rwxr-xr-xprog/main.elfbin8764 -> 0 bytes
-rw-r--r--prog/main.hex16
-rw-r--r--prog/main.obin4880 -> 0 bytes
-rw-r--r--prog/src/prog.s (renamed from prog/main.s)0
-rw-r--r--rom/rom.hex16
-rw-r--r--src/rom.v2
9 files changed, 47 insertions, 46 deletions
diff --git a/Makefile b/Makefile
index e23abd1..7781e40 100644
--- a/Makefile
+++ b/Makefile
@@ -39,6 +39,27 @@ FAMILY = GW1N-9C
DEVICE = GW1NR-LV9QN88PC6/I5
BOARD = tangnano9k
+# RISCV Toolchain
+RISCV_TOOLCHAIN = riscv64-unknown-elf
+RISCV_AS = $(RISCV_TOOLCHAIN)-as
+RISCV_CC = $(RISCV_TOOLCHAIN)-gcc
+RISCV_LD = $(RISCV_TOOLCHAIN)-ld
+RISCV_OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
+
+RISCV_ASFLAGS = -march=rv32i -mabi=ilp32
+RISCV_CFLAGS = -march=rv32i -mabi=ilp32 -O2 -Wall
+RISCV_LDFLAGS = -T prog/link.ld -m elf32lriscv
+
+PROG_SOURCE_DIR = prog/src
+
+PROG_ASSEMBLY_SOURCES = $(wildcard $(PROG_SOURCE_DIR)/*.s)
+PROG_C_SOURCES = $(wildcard $(PROG_SOURCE_DIR)/*.c)
+PROG_OBJECT_FILES = $(PROG_ASSEMBLY_SOURCES:$(PROG_SOURCE_DIR)/%.s=$(BUILD_DIR)/%.o) $(PROG_C_SOURCES:$(PROG_SOURCE_DIR)/%.c=$(BUILD_DIR)/%.o)
+PROG_ELF_FILE = $(BUILD_DIR)/prog.elf
+PROG_BINARY_FILE = $(BUILD_DIR)/prog.bin
+PROG_ROM_FILE = $(BUILD_DIR)/rom.hex
+
+
all: simulate
@@ -77,7 +98,7 @@ $(BITSTREAM): $(BUILD_DIR)/$(PRJ_NAME)_pnr.json
bitstream: $(BITSTREAM)
-program: $(BITSTREAM)
+upload: $(BITSTREAM)
$(PROGRAMMER) -b $(BOARD) $(BITSTREAM)
flash: $(BITSTREAM)
@@ -86,7 +107,7 @@ flash: $(BITSTREAM)
simulate: $(WAVEFORM_FILES)
# Build the testbench executables
-$(BUILD_DIR)/testbench_%: $(SIM_DIR)/testbench_%.v $(SRC_FILES) | $(BUILD_DIR)
+$(BUILD_DIR)/testbench_%: $(SIM_DIR)/testbench_%.v $(SRC_FILES) | $(BUILD_DIR) $(PROG_ROM_FILE)
$(IVERILOG) -o $@ $^
# Build the test vector generator executables
@@ -109,6 +130,28 @@ $(BUILD_DIR)/waveform_%.vcd: $(BUILD_DIR)/testbench_% $(BUILD_DIR)/testvec_%.txt
@echo "==================================================="
@echo
+rom: $(PROG_ROM_FILE)
+
+# Assemble assembly source files into object files
+$(BUILD_DIR)/%.o: $(PROG_SOURCE_DIR)/%.s | $(BUILD_DIR)
+ $(RISCV_AS) $(RISCV_ASFLAGS) -o $@ $<
+
+# Compile C source files into object files
+$(BUILD_DIR)/%.o: $(PROG_SOURCE_DIR)/%.c | $(BUILD_DIR)
+ $(RISCV_CC) $(RISCV_CFLAGS) -c -o $@ $<
+
+# Link the object files to create an ELF file
+$(PROG_ELF_FILE): $(PROG_OBJECT_FILES)
+ $(RISCV_LD) $(RISCV_LDFLAGS) -o $@ $^
+
+# Convert the ELF file to a binary file
+$(PROG_BINARY_FILE): $(PROG_ELF_FILE)
+ $(RISCV_OBJCOPY) -O binary $< $@
+
+# Convert the binary file to a hex file
+$(PROG_ROM_FILE): $(PROG_BINARY_FILE)
+ xxd -g 1 -c 1 -p $< > $@
+
# Create the build directory
$(BUILD_DIR):
mkdir -p $(BUILD_DIR)
@@ -117,5 +160,5 @@ $(BUILD_DIR):
clean:
rm -rf $(BUILD_DIR)
-.PHONY: all simulate bitsream program flash clean
+.PHONY: all simulate rom bitsream upload flash clean
diff --git a/genrom/genrom.c b/genrom/genrom.c
deleted file mode 100644
index 4bb5bf2..0000000
--- a/genrom/genrom.c
+++ /dev/null
@@ -1,10 +0,0 @@
-#include <stdio.h>
-#include <stdlib.h>
-
-int main(int argc, char *argv[]) {
- int rom_size = 1024;
-
- for (uint32_t i = 0; i < rom_size; ++i) {
- printf("%02x\n", i % 32);
- }
-}
diff --git a/prog/main.bin b/prog/main.bin
deleted file mode 100755
index ba70022..0000000
--- a/prog/main.bin
+++ /dev/null
Binary files differ
diff --git a/prog/main.elf b/prog/main.elf
deleted file mode 100755
index 4c53d74..0000000
--- a/prog/main.elf
+++ /dev/null
Binary files differ
diff --git a/prog/main.hex b/prog/main.hex
deleted file mode 100644
index 116b9b4..0000000
--- a/prog/main.hex
+++ /dev/null
@@ -1,16 +0,0 @@
-93
-02
-50
-00
-13
-03
-30
-00
-b3
-83
-62
-00
-6f
-00
-00
-00
diff --git a/prog/main.o b/prog/main.o
deleted file mode 100644
index e50c4a8..0000000
--- a/prog/main.o
+++ /dev/null
Binary files differ
diff --git a/prog/main.s b/prog/src/prog.s
index bbae5bb..bbae5bb 100644
--- a/prog/main.s
+++ b/prog/src/prog.s
diff --git a/rom/rom.hex b/rom/rom.hex
deleted file mode 100644
index 116b9b4..0000000
--- a/rom/rom.hex
+++ /dev/null
@@ -1,16 +0,0 @@
-93
-02
-50
-00
-13
-03
-30
-00
-b3
-83
-62
-00
-6f
-00
-00
-00
diff --git a/src/rom.v b/src/rom.v
index 0a00479..a2e12cd 100644
--- a/src/rom.v
+++ b/src/rom.v
@@ -12,7 +12,7 @@ module rom #(
reg [7:0] memory [0:SIZE-1];
initial begin
- $readmemh("rom/rom.hex", memory, 0, SIZE-1);
+ $readmemh("build/rom.hex", memory, 0, SIZE-1);
end
always @(posedge clk) begin