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authorFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-20 23:44:43 +0200
committerFlavian Kaufmann <flavian@flaviankaufmann.ch>2024-05-20 23:44:43 +0200
commit69e2696658a3654f575a7a995d859fa821219676 (patch)
treea2e8d277fe2436cdbd61e3ca4689885db3b09f5c
parente945c80a6ceaef501350de49bf647ae8539d1cbb (diff)
downloadriscv_cpu-69e2696658a3654f575a7a995d859fa821219676.tar.gz
riscv_cpu-69e2696658a3654f575a7a995d859fa821219676.zip
added some graphics
-rw-r--r--README.md11
-rw-r--r--prog/link.ld40
-rw-r--r--prog/src/startup.c54
-rw-r--r--res/control_unit_fsm.jpgbin0 -> 998456 bytes
-rw-r--r--res/memory_layout.jpgbin0 -> 344615 bytes
-rw-r--r--res/microarchitecure.jpgbin0 -> 698890 bytes
6 files changed, 54 insertions, 51 deletions
diff --git a/README.md b/README.md
index b65fea9..010dd4c 100644
--- a/README.md
+++ b/README.md
@@ -16,6 +16,7 @@ The board used in this project is a [Tang Nano 9K](https://wiki.sipeed.com/hardw
* `make clean` to clean build files.
* `gtkwave build/waveform_*.vcd` to view waveform of corresponding testbench.
* `make rom` to compile source files in prog/src, link and generate rom file.
+* `make objdump` to disassemble rom file.
* `make wave` to view waveform of cpu running build/rom.hex.
## Tools
@@ -48,7 +49,7 @@ The board used in this project is a [Tang Nano 9K](https://wiki.sipeed.com/hardw
* I-type: addi, andi, ori, xori, slti, sltiu, slli, srli, srai, lw
* S-type: sw
* B-type: beq, bne, blt, bge, bltu, bgeu
-* U-type:
+* U-type: lui, auipc
* J-type: jal, jalr
## Resources
@@ -59,7 +60,13 @@ The board used in this project is a [Tang Nano 9K](https://wiki.sipeed.com/hardw
* [Operating Systems: Three Easy Pieces by Remzi and Andrea Arpaci-Dusseau](https://pages.cs.wisc.edu/~remzi/OSTEP/)
* [Example RISCV Cores](https://github.com/yunchenlo/awesome-RISCV-Cores)
-
+## Design
+### Microarchitecture
+![Microarchitecture](res/microarchitecture.jpg)
+### Control Unit FSM
+![Control Unit FSM](res/control_unit_fsm.jpg)
+### Memory Layout
+![Memory Layout](res/memory_layout.jpg)
## Waveform Example
Here we can see the waveforms of various internal signal of the CPU, executing the following instructions:
diff --git a/prog/link.ld b/prog/link.ld
index ae0988f..5c9926c 100644
--- a/prog/link.ld
+++ b/prog/link.ld
@@ -1,7 +1,7 @@
MEMORY
{
- ROM (rx) : ORIGIN = 0x00010000, LENGTH = 4K
- RAM (rwx) : ORIGIN = 0x00100000, LENGTH = 4K
+ ROM (rx) : ORIGIN = 0x00010000, LENGTH = 4K /* (1024 words, 0x0001_0000 to 0x0001_FFFF) */
+ RAM (rwx) : ORIGIN = 0x00100000, LENGTH = 4K /* (1024 words, 0x0010_0000 to 0x0010_FFFF) */
}
ENTRY(_start)
@@ -12,61 +12,61 @@ SECTIONS
{
_stext = .;
. = ORIGIN(ROM);
- _start = .; /* Entry point address */
- KEEP(*(.text.startup)) /* Ensure startup code is kept */
- *(.text) /* .text sections (code) */
+ _start = .; /* entry point address */
+ *(.text.startup)
+ *(.text) /* .text sections (code) */
*(.text.*)
. = ALIGN(4);
- _etext = .; /* End of code section, needed for copying .data */
+ _etext = .; /* end of code section */
} > ROM
.rodata :
{
- *(.rodata) /* Read-only data */
+ *(.rodata) /* Read-only data */
*(.rodata.*)
} > ROM
.data :
{
- _sidata = LOADADDR(.data); /* Start address of .data section in ROM */
+ _sidata = LOADADDR(.data); /* start address of .data section in ROM */
. = ALIGN(4);
- _sdata = .; /* Start of .data section in RAM */
- *(.data) /* .data sections (initialized data) */
+ _sdata = .; /* start of .data section in RAM */
+ *(.data) /* .data sections (initialized data) */
*(.data.*)
*(.sdata) /* .sdata sections (small initialized data) */
*(.sdata.*)
. = ALIGN(4);
- _edata = .; /* End of .data section in RAM */
+ _edata = .; /* end of .data section in RAM */
} > RAM AT > ROM
.bss :
{
. = ALIGN(4);
- _sbss = .; /* Start of .bss section */
- *(.bss) /* .bss sections (zero-initialized data) */
+ _sbss = .; /* start of .bss section */
+ *(.bss) /* .bss sections (zero-initialized data) */
*(.bss.*)
*(.sbss) /* .sbss sections (small zero-initialized data) */
*(.sbss.*)
*(COMMON)
. = ALIGN(4);
- _ebss = .; /* End of .bss section */
+ _ebss = .; /* end of .bss section */
} > RAM
.heap (NOLOAD) :
{
. = ALIGN(4);
- _sheap = .; /* Start of heap */
- . = . + 1K; /* Size of heap (adjust as needed) */
- _eheap = .; /* End of heap */
+ _sheap = .; /* start of heap */
+ . = . + 1K; /* size of heap */
+ _eheap = .; /* end of heap */
. = ALIGN(4);
} > RAM
.stack (NOLOAD) :
{
. = ALIGN(4);
- _sstack = .; /* Start of stack */
- . = . + 1K; /* Size of stack (adjust as needed) */
- _estack = .; /* End of stack */
+ _sstack = .; /* start of stack */
+ . = . + 1K; /* size of stack */
+ _estack = .; /* end of stack */
. = ALIGN(4);
} > RAM
diff --git a/prog/src/startup.c b/prog/src/startup.c
index 32aa131..c09f221 100644
--- a/prog/src/startup.c
+++ b/prog/src/startup.c
@@ -1,39 +1,35 @@
-extern unsigned int _sidata; /* Start address for the .data section in ROM */
-extern unsigned int _sdata; /* Start address for the .data section in RAM */
-extern unsigned int _edata; /* End address for the .data section in RAM */
-extern unsigned int _sbss; /* Start address for the .bss section */
-extern unsigned int _ebss; /* End address for the .bss section */
-extern unsigned int _estack; /* End address for the stack section */
+extern unsigned int _sidata; // start of .data section in ROM
+extern unsigned int _sdata; // start of .data section in RAM
+extern unsigned int _edata; // end of .data section in RAM
+extern unsigned int _sbss; // start of .bss section
+extern unsigned int _ebss; // end of .bss section
+extern unsigned int _estack; // end of .stack section (stack top)
-void main(void); /* The main function declaration */
-void _start(void) __attribute__((section(".text.startup"), naked)); /* The entry point */
+void main(void); // main function declaration
+
+void _start(void) __attribute__((section(".text.startup"), naked)); // entry point, cpu starts executing from here
void _start(void)
{
- unsigned int *src, *dest;
-
- /* Copy .data section from ROM to RAM */
- src = &_sidata; /* ROM address of the .data section */
- for (dest = &_sdata; dest < &_edata;)
- {
- *dest++ = *src++;
- }
-
- //while(1);
+ unsigned int *src, *dst;
- /* Zero initialize .bss section */
- for (dest = &_sbss; dest < &_ebss;)
- {
- *dest++ = 0;
- }
+ // copy .data section from ROM to RAM
+ src = &_sidata;
+ for (dst = &_sdata; dst < &_edata;) {
+ *dst++ = *src++;
+ }
+ // zero initialize .bss section
+ for (dst = &_sbss; dst < &_ebss;) {
+ *dst++ = 0;
+ }
- /* Initialize stack pointer */
- asm volatile ("la sp, _estack");
+ // initialize stack pointer
+ asm volatile ("la sp, _estack");
- /* Call the main function */
- main();
+ // call main function
+ main();
- /* If main returns, loop forever */
- while (1);
+ // halt
+ while (1);
}
diff --git a/res/control_unit_fsm.jpg b/res/control_unit_fsm.jpg
new file mode 100644
index 0000000..a6b2bfc
--- /dev/null
+++ b/res/control_unit_fsm.jpg
Binary files differ
diff --git a/res/memory_layout.jpg b/res/memory_layout.jpg
new file mode 100644
index 0000000..893aa4d
--- /dev/null
+++ b/res/memory_layout.jpg
Binary files differ
diff --git a/res/microarchitecure.jpg b/res/microarchitecure.jpg
new file mode 100644
index 0000000..f182fe8
--- /dev/null
+++ b/res/microarchitecure.jpg
Binary files differ