From 8d5d730269cc94fa8d5caed0e1996e3d94be25d1 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Sun, 5 May 2024 10:27:21 +0200 Subject: added register file --- src/register_file.v | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 src/register_file.v (limited to 'src/register_file.v') diff --git a/src/register_file.v b/src/register_file.v new file mode 100644 index 0000000..81bce34 --- /dev/null +++ b/src/register_file.v @@ -0,0 +1,30 @@ +module register_file #( + parameter N = 32, + parameter XLEN = 32 +)( + input clk, rst, we, + input [log2(N)-1:0] addr_rs0, addr_rs1, addr_rd2, + input [N-1:0] data_rd2, + output [N-1:0] data_rs0, data_rs1 +); + +`include "include/log2.vh" + +reg [N-1:0] registers[XLEN-1:1]; + +assign data_rs0 = (addr_rs0 == 0) ? 0 : registers[addr_rs0]; +assign data_rs1 = (addr_rs1 == 0) ? 0 : registers[addr_rs1]; + + + +integer i; +always @(posedge clk) begin + if (rst) begin + for (i = 1; i < XLEN; i = i + 1) + registers[i] <= 0; + end else if (we && (addr_rd2 != 0)) begin + registers[addr_rd2] <= data_rd2; + end +end + +endmodule -- cgit v1.2.3