From 3f3fd75006901cdd01a231785b6a2e43b5dc8a52 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Thu, 2 May 2024 08:11:36 +0200 Subject: register file --- src/register_file.v | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 src/register_file.v (limited to 'src/register_file.v') diff --git a/src/register_file.v b/src/register_file.v new file mode 100644 index 0000000..4f09773 --- /dev/null +++ b/src/register_file.v @@ -0,0 +1,41 @@ +module register_file #( + parameter N = 32, + parameter XLEN = 32 +)( + input [CLOG2(XLEN)-1:0] A1, A2, A3, + input CLK, + input RST, + input WE3, + input [N-1:0] WD3, + output [N-1:0] RD1, RD2 +); + + reg [N-1:0] registers[XLEN-1:0]; + + assign RD1 = A1 == 0 ? 0 : registers[A1]; + assign RD2 = A2 == 0 ? 0 : registers[A2]; + + always @ (posedge CLK or negedge RST) begin + if (!RST) begin + integer i; + for (i = 0; i < XLEN; i = i + 1) begin + registers[i] <= 0; + end + end else if (WE3 && (A3 != 0)) begin + registers[A3] <= WD3; + end + end + + + + function integer CLOG2(input integer value); + integer i; + begin + value = value - 1; + for (i = 0; value > 0; i = i + 1) + value = value >> 1; + CLOG2 = i; + end + endfunction + +endmodule -- cgit v1.2.3