From 48205bf3e8d421b6aa0474a4d120ae5faaaaa670 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Mon, 13 May 2024 07:46:45 +0200 Subject: refactoring, runs now on fpga --- src/ram.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/ram.v') diff --git a/src/ram.v b/src/ram.v index 1573de8..8234d5d 100644 --- a/src/ram.v +++ b/src/ram.v @@ -17,7 +17,7 @@ reg [8:0] memory [SIZE-1:0]; assign data_read = { memory[addr + 3], memory[addr + 2], memory[addr + 1], memory[addr + 0] }; -always @(posedge clk /*or posedge rst*/) begin +always @(posedge clk) begin if (we) begin { memory[addr + 3], memory[addr + 2], memory[addr + 1], memory[addr + 0] } = data_write; end -- cgit v1.2.3