From 48205bf3e8d421b6aa0474a4d120ae5faaaaa670 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Mon, 13 May 2024 07:46:45 +0200 Subject: refactoring, runs now on fpga --- src/pc_reg.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/pc_reg.v') diff --git a/src/pc_reg.v b/src/pc_reg.v index 9d7600b..91bf85f 100644 --- a/src/pc_reg.v +++ b/src/pc_reg.v @@ -1,15 +1,15 @@ module pc_reg ( input clk, input rstn, + input we, input [31:0] pc_in, + output reg [31:0] pc ); - parameter PC_INITIAL = 32'h0001_0000; - always @ (posedge clk) begin if (!rstn) pc <= PC_INITIAL; else if (we) pc <= pc_in; -- cgit v1.2.3