From 05366e24d8b3cfca4b856b1b3740d535cbdf7dd7 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Mon, 13 May 2024 08:06:30 +0200 Subject: async reset --- src/instruction_reg.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/instruction_reg.v') diff --git a/src/instruction_reg.v b/src/instruction_reg.v index 3c81cf6..d98ab6d 100644 --- a/src/instruction_reg.v +++ b/src/instruction_reg.v @@ -7,7 +7,7 @@ module instruction_reg ( output reg [31:0] pc_buf, instr ); -always @ (posedge clk) begin +always @ (posedge clk or negedge rstn) begin if (!rstn) begin pc_buf <= 32'b0; instr <= 32'b0; -- cgit v1.2.3