From 05366e24d8b3cfca4b856b1b3740d535cbdf7dd7 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Mon, 13 May 2024 08:06:30 +0200 Subject: async reset --- src/alu_result_reg.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/alu_result_reg.v') diff --git a/src/alu_result_reg.v b/src/alu_result_reg.v index 8de7a08..cece9e4 100644 --- a/src/alu_result_reg.v +++ b/src/alu_result_reg.v @@ -1,12 +1,12 @@ module alu_result_reg ( input clk, input rstn, - + input [31:0] alu_result_in, output reg [31:0] alu_result_buf ); -always @ (posedge clk) begin +always @ (posedge clk or negedge rstn) begin if (!rstn) alu_result_buf <= 32'b0; else alu_result_buf <= alu_result_in; end -- cgit v1.2.3