From 9d69eaa8e3be69ead0918d915bdacb7d0def9281 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Tue, 7 May 2024 17:27:41 +0200 Subject: cpu --- sim/testbench_register_file.v | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'sim/testbench_register_file.v') diff --git a/sim/testbench_register_file.v b/sim/testbench_register_file.v index 79825dc..a22f3e1 100644 --- a/sim/testbench_register_file.v +++ b/sim/testbench_register_file.v @@ -14,12 +14,12 @@ register_file uut ( .clk(clk), .rst(rst), .we(we), - .addr_read0(addr_rs0), - .addr_read1(addr_rs1), - .addr_write2(addr_rd2), - .data_read0(data_rs0), - .data_read1(data_rs1), - .data_write2(data_rd2) + .rs1(addr_rs0), + .rs2(addr_rs1), + .rd(addr_rd2), + .rs1_data(data_rs0), + .rs2_data(data_rs1), + .rd_data(data_rd2) ); integer file, r, eof; -- cgit v1.2.3