From c6e342f93d1a7fe92d2a7e1b4e488f328e1f4469 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Thu, 23 May 2024 07:04:37 +0200 Subject: align --- rtl/src/register_file_reg.v | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'rtl/src/register_file_reg.v') diff --git a/rtl/src/register_file_reg.v b/rtl/src/register_file_reg.v index 049f53c..7d9cc03 100644 --- a/rtl/src/register_file_reg.v +++ b/rtl/src/register_file_reg.v @@ -2,11 +2,11 @@ // Stores outputs of register file for one more clock cycle. module register_file_reg ( - input clk, - input rstn, + input clk, + input rstn, - input [31:0] rd1_in, - input [31:0] rd2_in, + input [31:0] rd1_in, + input [31:0] rd2_in, output reg [31:0] rd1_buf, output reg [31:0] rd2_buf -- cgit v1.2.3