From cb0be9e2039569ee7d18657e8f675d1f8369b407 Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Tue, 21 May 2024 13:50:28 +0200 Subject: restructured project --- rtl/src/arithmetic_unit.v | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 rtl/src/arithmetic_unit.v (limited to 'rtl/src/arithmetic_unit.v') diff --git a/rtl/src/arithmetic_unit.v b/rtl/src/arithmetic_unit.v new file mode 100644 index 0000000..1a2282b --- /dev/null +++ b/rtl/src/arithmetic_unit.v @@ -0,0 +1,27 @@ +module arithmetic_unit ( + input [31:0] a, + input [31:0] b, + + input [1:0] op, + + output reg [31:0] result +); + +`include "include/consts.vh" + +wire signed [31:0] a_signed, b_signed; + +assign a_signed = a; +assign b_signed = b; + +always @ (*) begin + case (op) + ARITHMETIC_OP_ADD: result = a + b; // ADD + ARITHMETIC_OP_SUB: result = a - b; // SUB + ARITHMETIC_OP_SLT: result = { {31{1'b0}}, a_signed < b_signed }; // SLT + ARITHMETIC_OP_SLTU: result = { {31{1'b0}}, a < b }; // SLTU + default: result = 32'b0; + endcase +end + +endmodule -- cgit v1.2.3