From ee94c97e4f8208d0c7404887cda16d00f67c6f1f Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Tue, 21 May 2024 15:57:42 +0200 Subject: comments --- rtl/src/alu_result_reg.v | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'rtl/src/alu_result_reg.v') diff --git a/rtl/src/alu_result_reg.v b/rtl/src/alu_result_reg.v index cece9e4..377760a 100644 --- a/rtl/src/alu_result_reg.v +++ b/rtl/src/alu_result_reg.v @@ -1,3 +1,7 @@ +// alu result reg: +// Stores alu_result for one more clock cycle. +// This is used for example on load/store, alu wb, etc. + module alu_result_reg ( input clk, input rstn, -- cgit v1.2.3