From d1133b1f41d426482cb54b747caada8427654b3a Mon Sep 17 00:00:00 2001 From: Flavian Kaufmann Date: Wed, 8 May 2024 11:39:56 +0200 Subject: fixed bug where register addresses were used instead of data --- src/alu_op_decode.v | 3 ++- src/cpu.v | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/alu_op_decode.v b/src/alu_op_decode.v index 8e801c8..895b952 100644 --- a/src/alu_op_decode.v +++ b/src/alu_op_decode.v @@ -19,7 +19,8 @@ parameter ALU_OP_ADD = 4'b0000, always @ (*) begin - case (opcode) + if (alu_ctrl == 2'b00) alu_op <= ALU_OP_ADD; + else case (opcode) 7'b0110011: begin // ADD, SUB, SLL, SLT, SLTU, XOR, SRL, SRA, OR, AND case (funct3) 3'b000: alu_op <= funct7[5] ? ALU_OP_SUB : ALU_OP_ADD; diff --git a/src/cpu.v b/src/cpu.v index b839477..5362cf9 100644 --- a/src/cpu.v +++ b/src/cpu.v @@ -123,8 +123,8 @@ always @ (posedge clk or posedge rst) begin a_buf <= 32'b0; b_buf <= 32'b0; end else begin - a_buf <= rs1; - b_buf <= rs2; + a_buf <= rs1_data; + b_buf <= rs2_data; end end -- cgit v1.2.3